1. Inside the Microprocessor 🧠
A microprocessor ($\mu P$) contains the Arithmetic Logic Unit (ALU), Control Unit (CU), and Registers. It fetches instructions from memory and executes them.
Key Buses (The Highway System)
- Address Bus: Unidirectional. CPU $\to$ Memory/IO. Width determines memory capacity ($2^n$). 16-bit bus = 64KB. 32-bit = 4GB.
- Data Bus: Bidirectional. Carries actual data. Width determines word size (8-bit, 16-bit, 64-bit processor).
- Control Bus: Timing and control signals (Read, Write, Interrupt, Reset).
2. The 8085 Architecture (Classic) 🕰️
Why study a chip from the 70s? Because it's the simplest model to understand the basics.
| Register | Function |
|---|---|
| Accumulator (A) | 8-bit. Main operand for ALU. Result stored here. |
| Flags (F) | Status bits: Sign, Zero, Auxiliary Carry, Parity, Carry. |
| PC (Program Counter) | 16-bit. Points to NEXT instruction address. |
| SP (Stack Pointer) | 16-bit. Points to top of stack in RAM. |
| BC, DE, HL | General purpose pairs. HL often used as memory pointer. |
3. Addressing Modes 🎯
How does the CPU know WHERE the data is? The Addressing Mode tells it.
-
Immediate: Data is in instruction.
MVI A, 05H(Move 05 hex into A). -
Direct: Memory address is in instruction.
LDA 2000H(Load A from address 2000). -
Register: Data is in a register.
MOV A, B(Copy B to A). -
Register Indirect: Register holds the address.
MOV A, M(Move data from address in HL pair to A).
4. Interrupts ⚡
Hardware signals that stop the CPU to handle an urgent event.
Vector vs Non-Vector: Vector interrupts jump to a specific fixed address (ISR). Non-vector needs external device to supply address.
Maskable vs Non-Maskable: Maskable can be ignored (disabled). Non-Maskable (NMI/TRAP) MUST be serviced immediately (used for critical power failure, etc.).
Maskable vs Non-Maskable: Maskable can be ignored (disabled). Non-Maskable (NMI/TRAP) MUST be serviced immediately (used for critical power failure, etc.).